Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA

Tchahou Tchendjeu Achille Ecladore; Tchitnga Robert; Fotsin Hillarie Bertrand

doi:doi:10.11648/j.cssp.20211001.13

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Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA

Tchahou Tchendjeu Achille Ecladore, Tchitnga Robert, Fotsin Hillarie Bertrand

Published in Science Journal of Circuits, Systems and Signal Processing (Volume 10, Issue 1)

Received: 2 May 2021 Accepted: 19 May 2021 Published: 27 May 2021

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Abstract

In our paper, we present the implementation of two kinds of FPGA-based modulators: ASK and QAM signal modulators. The ASK modulators we implemented are OOK, ASK, and 4ASK, then the QAM modulators implemented are 4QAM and 16QAM. The generation of the sine wave carrier is the main task when implementing any digital transmitter including ASK and QAM modulators. For us to implement these modulators, a sine function with floating-point operation as per IEEE754 standards is used based on Hardware Description Language technique. When the carrier is generated, the digital message modulates the amplitude of the carrier. To implement the QAM modulator, we need two sinusoidal carriers. A cosine function and a sine function are built to get the two carriers. Alongside to this work, ASK and QAM signal modulators are implemented using 26-bit phase accumulator and Look Up Table to generate the sine and cosine functions, then comparison of speed, occupied area and estimated power consume are done with the proposed modulators. Without using DSP builder tools or an Altera system generator, we implemented the whole systems using VHDL on cyclone IV-E-EP4CE115F29C7N of the board DE2-115. In general, the proposed modulator design present low area and power consummation than modulator using LUT or CORDIC.

Published in	Science Journal of Circuits, Systems and Signal Processing (Volume 10, Issue 1)
DOI	10.11648/j.cssp.20211001.13
Page(s)	15-24
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2021. Published by Science Publishing Group

Keywords

FPGA, ASK, QAM, LUT, Digital Modulator

References

[1]	J. Mitola. “Software radio-survey, critical evaluation and future directions”. In Proceedings of IEEE National Telesystems Conference, 13-25, (1992).
[2]	J. Mitola. “The software radio architecture”. IEEE Communications Magazine, 33, 26-38, (1995).
[3]	J. Mitola. “Software radio architecture: a mathematical perspective”. IEEE Journal on Selected Areas in Communications, 17, 514-538, (1999).
[4]	F. Quadri and A. D. Tete. “FPGA implementation of digital modulation techniques”. In Proceedings of IEEE International Conference on Communications and Signal Processing (ICCSP), Melmaruvathur, India, 913-917, (2013).
[5]	C. Erdogan, I. Myderrizi and S. Minaei. “FPGA implementation of BASK-BFSK-BPSK digital modulators,” IEEE Antennas and Propagations Magazine, 54, 2, 262-269, (2012).
[6]	P. A. Bhore and M. Sarde. “BPSK modulation and demodulation scheme on Spartan-3 FPGA”, IORD Journal of Science & Technology, 1, 3, 38-45, (2014).
[7]	S. O. Popescu, A. S. Gontean and G. Budura. “BPSK system on Spartan 3E FPGA,” in Proceedings of IEEE 10th International Symposium on Applied Machine Intelligence and Informatics (SAMI), 301-306, (2012).
[8]	Y. H. Chye, M. F. Ain and N. M. Zawawi. “Design of BPSK transmitter using FPGA with DAC,” In Proceedings of IEEE 9^th International Conference on Communications (MICC), Kuala Lumpur, Malaysia, 451-456, (2009).
[9]	S. Rajaram and R. Gayathre. “FPGA implementation of digital modulation schemes,” International Journal of Innovative Research in Science, Engineering and Technology, 3, 3, (2014).
[10]	Z. Ye, J. Grosspietsch and G. Memik. “An FPGA based all-digital transmitter with radio frequency output for software defined radio,” In Proceedings of Europe Conference & Exhibition on Design, Automation & Test, 1-6, (2007).
[11]	H. Bostron. “An FPGA implementation of a digital FM modulator,” M. sc thesis, Linkoping’s University, Sweden, (2011).
[12]	J. Mangala and J. Manikandan. “FPGA implementation of reconfigurable modulation system,” in Proceedings of IEEE International Conference on Advances in Computing, Communications and Informatics (ICACCI), 493-500, (2015).
[13]	A. O. Kislal, A. Demiray, O. Ceylan, and H. B. Yagci. “Implementation of a software defined FM mixed demodulator on FPGA,” in Proceedings of IEEE 23rd Telecommunications forum (TELFOR), Serbia, Belgrade, 24-26, (2015).
[14]	T. Adiono, N. Ahmadi, A. P. Renardy, A. A. Fadila and N. Shidqi. “A pipelined CORDIC architecture and its implementation in all digital FM modulator-demodulator,” in Proceedings of IEEE 6^th Asia Symposium on Quality Electronic Design (ASQED), Kula Lumpur, Malaysia, 37-42, (2015).
[15]	E. Senthilkumar, J. Manikandan and V. K. Agrawal. "Design and evaluation of FPGA based frequency demodulators, " in Proceedings of IEEE International Conference on Advances in Computing, Communications and Informatics (ICACCI), 668-674, (2015).
[16]	I. Hatai and I. Chakrabarti. “A new high-performance digital FM modulator and demodulator for software-defined radio and its FPGA implementation,” International Journal of Reconfigurable Computing, 2011, 2-7, (2011).
[17]	I. Hatai and I. Chakrabarti. “FPGA implementation of a digital FM modem for SDR architecture,” in Proceedings of IEEE International Conference on Information and Multimedia Technology, 475-479, (2009).
[18]	A. E. Tchahou Tchendjeu, R. Tchitnga, H. B. Fotsin. “FPGA Implementation of Linear Congruential Generator Based on Block Reduction Technique”. Journal of Circuits, Systems, and Computers, 27, 10, 1850154-1850163 (2018).
[19]	A. Al-Safi and B. Bazuin. “'FPGA based implementation of BPSK and QPSK modulators using address reverse accumulators,” In Proceedings of The 7th IEEE Annual Ubiquitous Computing, Electronics & Mobile Communication Conference, Columbia University, New York City, USA, 20-22, (2016).
[20]	A. Al-Safi and B. Bazuin. “Toward Digital Transmitters with Amplitude Shift Keying and Quadrature Amplitude Modulators Implementation Examples,” In Proceedings of The 7th IEEE Annual Computing and Communication Workshop and Conference (CCWC), Las-Vegas, USA, (2017).
[21]	R. M. Nguimdo, R. Tchitnga, and P. Woafo. “Dynamics of coupled simplest chaotic two-component electronic circuits and its potential application to random bit generation”. Chaos and interdisciplinary journal of Nonlinear Science. 23, 4, 043122, (2013).

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APA Style

Tchahou Tchendjeu Achille Ecladore, Tchitnga Robert, Fotsin Hillarie Bertrand. (2021). Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA. Science Journal of Circuits, Systems and Signal Processing, 10(1), 15-24. https://doi.org/10.11648/j.cssp.20211001.13

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ACS Style

Tchahou Tchendjeu Achille Ecladore; Tchitnga Robert; Fotsin Hillarie Bertrand. Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA. Sci. J. Circuits Syst. Signal Process. 2021, 10(1), 15-24. doi: 10.11648/j.cssp.20211001.13

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AMA Style

Tchahou Tchendjeu Achille Ecladore, Tchitnga Robert, Fotsin Hillarie Bertrand. Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA. Sci J Circuits Syst Signal Process. 2021;10(1):15-24. doi: 10.11648/j.cssp.20211001.13

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@article{10.11648/j.cssp.20211001.13,
  author = {Tchahou Tchendjeu Achille Ecladore and Tchitnga Robert and Fotsin Hillarie Bertrand},
  title = {Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA},
  journal = {Science Journal of Circuits, Systems and Signal Processing},
  volume = {10},
  number = {1},
  pages = {15-24},
  doi = {10.11648/j.cssp.20211001.13},
  url = {https://doi.org/10.11648/j.cssp.20211001.13},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.cssp.20211001.13},
  abstract = {In our paper, we present the implementation of two kinds of FPGA-based modulators: ASK and QAM signal modulators. The ASK modulators we implemented are OOK, ASK, and 4ASK, then the QAM modulators implemented are 4QAM and 16QAM. The generation of the sine wave carrier is the main task when implementing any digital transmitter including ASK and QAM modulators. For us to implement these modulators, a sine function with floating-point operation as per IEEE754 standards is used based on Hardware Description Language technique. When the carrier is generated, the digital message modulates the amplitude of the carrier. To implement the QAM modulator, we need two sinusoidal carriers. A cosine function and a sine function are built to get the two carriers. Alongside to this work, ASK and QAM signal modulators are implemented using 26-bit phase accumulator and Look Up Table to generate the sine and cosine functions, then comparison of speed, occupied area and estimated power consume are done with the proposed modulators. Without using DSP builder tools or an Altera system generator, we implemented the whole systems using VHDL on cyclone IV-E-EP4CE115F29C7N of the board DE2-115. In general, the proposed modulator design present low area and power consummation than modulator using LUT or CORDIC.},
 year = {2021}
}

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TY  - JOUR
T1  - Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA
AU  - Tchahou Tchendjeu Achille Ecladore
AU  - Tchitnga Robert
AU  - Fotsin Hillarie Bertrand
Y1  - 2021/05/27
PY  - 2021
N1  - https://doi.org/10.11648/j.cssp.20211001.13
DO  - 10.11648/j.cssp.20211001.13
T2  - Science Journal of Circuits, Systems and Signal Processing
JF  - Science Journal of Circuits, Systems and Signal Processing
JO  - Science Journal of Circuits, Systems and Signal Processing
SP  - 15
EP  - 24
PB  - Science Publishing Group
SN  - 2326-9073
UR  - https://doi.org/10.11648/j.cssp.20211001.13
AB  - In our paper, we present the implementation of two kinds of FPGA-based modulators: ASK and QAM signal modulators. The ASK modulators we implemented are OOK, ASK, and 4ASK, then the QAM modulators implemented are 4QAM and 16QAM. The generation of the sine wave carrier is the main task when implementing any digital transmitter including ASK and QAM modulators. For us to implement these modulators, a sine function with floating-point operation as per IEEE754 standards is used based on Hardware Description Language technique. When the carrier is generated, the digital message modulates the amplitude of the carrier. To implement the QAM modulator, we need two sinusoidal carriers. A cosine function and a sine function are built to get the two carriers. Alongside to this work, ASK and QAM signal modulators are implemented using 26-bit phase accumulator and Look Up Table to generate the sine and cosine functions, then comparison of speed, occupied area and estimated power consume are done with the proposed modulators. Without using DSP builder tools or an Altera system generator, we implemented the whole systems using VHDL on cyclone IV-E-EP4CE115F29C7N of the board DE2-115. In general, the proposed modulator design present low area and power consummation than modulator using LUT or CORDIC.
VL  - 10
IS  - 1
ER  -

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Author Information

Tchahou Tchendjeu Achille Ecladore

Department of Computer Engineering, University of Bamenda, Bambili, Cameroon
Tchitnga Robert

Department of Physics, University of Dschang, Dschang, Cameroon
Fotsin Hillarie Bertrand

Department of Physics, University of Dschang, Dschang, Cameroon

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APA Style

Tchahou Tchendjeu Achille Ecladore, Tchitnga Robert, Fotsin Hillarie Bertrand. (2021). Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA. Science Journal of Circuits, Systems and Signal Processing, 10(1), 15-24. https://doi.org/10.11648/j.cssp.20211001.13

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ACS Style

Tchahou Tchendjeu Achille Ecladore; Tchitnga Robert; Fotsin Hillarie Bertrand. Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA. Sci. J. Circuits Syst. Signal Process. 2021, 10(1), 15-24. doi: 10.11648/j.cssp.20211001.13

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AMA Style

Tchahou Tchendjeu Achille Ecladore, Tchitnga Robert, Fotsin Hillarie Bertrand. Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA. Sci J Circuits Syst Signal Process. 2021;10(1):15-24. doi: 10.11648/j.cssp.20211001.13

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@article{10.11648/j.cssp.20211001.13,
  author = {Tchahou Tchendjeu Achille Ecladore and Tchitnga Robert and Fotsin Hillarie Bertrand},
  title = {Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA},
  journal = {Science Journal of Circuits, Systems and Signal Processing},
  volume = {10},
  number = {1},
  pages = {15-24},
  doi = {10.11648/j.cssp.20211001.13},
  url = {https://doi.org/10.11648/j.cssp.20211001.13},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.cssp.20211001.13},
  abstract = {In our paper, we present the implementation of two kinds of FPGA-based modulators: ASK and QAM signal modulators. The ASK modulators we implemented are OOK, ASK, and 4ASK, then the QAM modulators implemented are 4QAM and 16QAM. The generation of the sine wave carrier is the main task when implementing any digital transmitter including ASK and QAM modulators. For us to implement these modulators, a sine function with floating-point operation as per IEEE754 standards is used based on Hardware Description Language technique. When the carrier is generated, the digital message modulates the amplitude of the carrier. To implement the QAM modulator, we need two sinusoidal carriers. A cosine function and a sine function are built to get the two carriers. Alongside to this work, ASK and QAM signal modulators are implemented using 26-bit phase accumulator and Look Up Table to generate the sine and cosine functions, then comparison of speed, occupied area and estimated power consume are done with the proposed modulators. Without using DSP builder tools or an Altera system generator, we implemented the whole systems using VHDL on cyclone IV-E-EP4CE115F29C7N of the board DE2-115. In general, the proposed modulator design present low area and power consummation than modulator using LUT or CORDIC.},
 year = {2021}
}

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TY  - JOUR
T1  - Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA
AU  - Tchahou Tchendjeu Achille Ecladore
AU  - Tchitnga Robert
AU  - Fotsin Hillarie Bertrand
Y1  - 2021/05/27
PY  - 2021
N1  - https://doi.org/10.11648/j.cssp.20211001.13
DO  - 10.11648/j.cssp.20211001.13
T2  - Science Journal of Circuits, Systems and Signal Processing
JF  - Science Journal of Circuits, Systems and Signal Processing
JO  - Science Journal of Circuits, Systems and Signal Processing
SP  - 15
EP  - 24
PB  - Science Publishing Group
SN  - 2326-9073
UR  - https://doi.org/10.11648/j.cssp.20211001.13
AB  - In our paper, we present the implementation of two kinds of FPGA-based modulators: ASK and QAM signal modulators. The ASK modulators we implemented are OOK, ASK, and 4ASK, then the QAM modulators implemented are 4QAM and 16QAM. The generation of the sine wave carrier is the main task when implementing any digital transmitter including ASK and QAM modulators. For us to implement these modulators, a sine function with floating-point operation as per IEEE754 standards is used based on Hardware Description Language technique. When the carrier is generated, the digital message modulates the amplitude of the carrier. To implement the QAM modulator, we need two sinusoidal carriers. A cosine function and a sine function are built to get the two carriers. Alongside to this work, ASK and QAM signal modulators are implemented using 26-bit phase accumulator and Look Up Table to generate the sine and cosine functions, then comparison of speed, occupied area and estimated power consume are done with the proposed modulators. Without using DSP builder tools or an Altera system generator, we implemented the whole systems using VHDL on cyclone IV-E-EP4CE115F29C7N of the board DE2-115. In general, the proposed modulator design present low area and power consummation than modulator using LUT or CORDIC.
VL  - 10
IS  - 1
ER  -

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